lpgbtfpga_framealigner.vhd
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1 -------------------------------------------------------
6 -------------------------------------------------------
7 
9 LIBRARY ieee;
10 USE ieee.std_logic_1164.all;
11 USE ieee.numeric_std.all;
12 
14 USE work.lpgbtfpga_package.all;
15 
20 ENTITY lpgbtfpga_framealigner IS
21  GENERIC (
22  c_wordRatio : integer;
23  c_wordSize : integer;
24  c_headerPattern : std_logic_vector;
25  c_allowedFalseHeader : integer;
26  c_allowedFalseHeaderOverN : integer;
27  c_requiredTrueHeader : integer;
28 
29  c_bitslip_mindly : integer := 1;
30  c_bitslip_waitdly : integer := 40
31  );
32  PORT (
33  -- Clock(s)
34  clk_pcsRx_i : in std_logic;
35 
36  -- Reset(s)
37  rst_pattsearch_i : in std_logic;
38 
39  -- Control
40  cmd_bitslipCtrl_o : out std_logic;
41 
42  -- Status
43  sta_headerLocked_o : out std_logic;
44  sta_headerFlag_o : out std_logic;
45  sta_bitSlipEven_o : out std_logic;
46 
47  -- Data
48  dat_word_i : in std_logic_vector(c_headerPattern'length-1 downto 0)
49  );
50 END lpgbtfpga_framealigner;
51 
57 ARCHITECTURE behavioral OF lpgbtfpga_framealigner IS
58 
59  --================================ Signal Declarations ================================--
60  TYPE machine IS (UNLOCKED, GOING_LOCK, LOCKED, GOING_UNLOCK);
61  SIGNAL state : machine;
62 
63  SIGNAL psAddress : integer RANGE 0 TO c_wordRatio;
64  SIGNAL shiftPsAddr : std_logic;
65  SIGNAL bitSlipCmd_s : std_logic;
66  SIGNAL headerFlag_s : std_logic;
67  SIGNAL sta_headerLocked_s : std_logic;
68  SIGNAL bitSlipCounter_s : integer RANGE 0 TO c_wordSize+1;
69 
70  SIGNAL cmd_bitslipDone_s : std_logic;
71 
72  SIGNAL sta_bitSlipEven_s : std_logic;
73 
74  TYPE rxBitSlipCtrlStateLatOpt_T IS (e0_idle, e4_doBitslip, e5_waitNcycles);
75  SIGNAL stateBitSlip : rxBitSlipCtrlStateLatOpt_T;
76 
77  SIGNAL dat_word_s : std_logic_vector(c_headerPattern'length-1 downto 0);
78 --=================================================================================================--
79 BEGIN --========#### Architecture Body ####========--
80 --=================================================================================================--
81 
82  --==================================== User Logic =====================================--
83  rxWordPipeline_proc: PROCESS(rst_pattsearch_i, clk_pcsRx_i)
84  BEGIN
85  IF rst_pattsearch_i = '1' THEN
86  dat_word_s <= (OTHERS => '0');
87  ELSIF rising_edge(clk_pcsRx_i) THEN
88  dat_word_s <= dat_word_i;
89  END IF;
90  END PROCESS;
91 
93  clkSlipProcess: PROCESS(rst_pattsearch_i, clk_pcsRx_i)
94  VARIABLE timer : integer RANGE 0 TO (c_bitslip_waitdly+c_bitslip_mindly);
95  BEGIN
96 
97  IF rst_pattsearch_i = '1' THEN
98  stateBitSlip <= e0_idle;
99  cmd_bitslipCtrl_o <= '0';
100  cmd_bitslipDone_s <= '0';
101 
102  ELSIF rising_edge(clk_pcsRx_i) THEN
103  CASE stateBitSlip is
104  WHEN e0_idle => cmd_bitslipDone_s <= '1';
105 
106  IF bitSlipCmd_s = '1' THEN
107  stateBitSlip <= e4_doBitslip;
108  timer := 0;
109  cmd_bitslipDone_s <= '0';
110  END IF;
111 
112  WHEN e4_doBitslip => cmd_bitslipCtrl_o <= '1';
113  IF timer >= c_bitslip_mindly-1 THEN
114  stateBitSlip <= e5_waitNcycles;
115  timer := 0;
116  ELSE
117  timer := timer + 1;
118  END IF;
119 
120  WHEN e5_waitNcycles => cmd_bitslipCtrl_o <= '0';
121  IF timer >= c_bitslip_waitdly-1 THEN
122  stateBitSlip <= e0_idle;
123  ELSE
124  timer := timer + 1;
125  END IF;
126  END CASE;
127  END IF;
128 
129  END PROCESS;
130 
131  sta_bitSlipEven_o <= sta_bitSlipEven_s ;
132 
133  sta_headerLocked_o <= sta_headerLocked_s;
134 
136  patternSearch_proc: PROCESS(rst_pattsearch_i, clk_pcsRx_i)
137  BEGIN
138 
139  IF rst_pattsearch_i = '1' THEN
140  bitSlipCmd_s <= '0';
141  sta_bitSlipEven_s <= '1';
142  bitSlipCounter_s <= 0;
143  shiftPsAddr <= '0';
144 
145  ELSIF rising_edge(clk_pcsRx_i) THEN
146  bitSlipCmd_s <= '0';
147  shiftPsAddr <= '0';
148 
149  IF state = UNLOCKED and psAddress = 0 and cmd_bitslipDone_s = '1' THEN
150 
151  IF (dat_word_s(c_headerPattern'length-1 downto 0) /= c_headerPattern) THEN
152 
153  if bitSlipCounter_s < c_wordSize+1 then
154  sta_bitSlipEven_s <= not(sta_bitSlipEven_s);
155  bitSlipCmd_s <= '1';
156  bitSlipCounter_s <= bitSlipCounter_s + 1;
157  else
158  shiftPsAddr <= '1'; -- MGT word jump is done only in PCS mode
159  bitSlipCounter_s <= 0;
160  end if;
161 
162  END IF;
163 
164  END IF;
165  END IF;
166  END PROCESS;
167 
169  patternSearchAddr_proc: PROCESS(rst_pattsearch_i, clk_pcsRx_i)
170  BEGIN
171 
172  IF rst_pattsearch_i = '1' THEN
173  psAddress <= 0;
174  headerFlag_s <= '0';
175 
176  ELSIF rising_edge(clk_pcsRx_i) THEN
177  headerFlag_s <= '0';
178 
179  IF psAddress = 0 THEN
180  headerFlag_s <= '1';
181  END IF;
182 
183  IF shiftPsAddr = '0' THEN
184  psAddress <= psAddress + 1;
185 
186  IF psAddress = c_wordRatio-1 THEN
187  psAddress <= 0;
188  END IF;
189 
190  END IF;
191  END IF;
192  END PROCESS;
193 
195  lockFSM_proc: PROCESS(rst_pattsearch_i, clk_pcsRx_i)
196  VARIABLE consecFalseHeaders : integer RANGE 0 TO c_allowedFalseHeader;
197  VARIABLE consecCorrectHeaders : integer RANGE 0 TO c_requiredTrueHeader;
198  VARIABLE nbCheckedHeaders : integer RANGE 0 TO c_allowedFalseHeaderOverN;
199 
200  BEGIN
201  IF rst_pattsearch_i = '1' THEN
202  state <= UNLOCKED;
203 
204  ELSIF rising_edge(clk_pcsRx_i) THEN
205 
206  IF psAddress = 0 and cmd_bitslipDone_s = '1' THEN
207  CASE state is
208 
209  WHEN UNLOCKED => IF (dat_word_s(c_headerPattern'length-1 downto 0) = c_headerPattern) THEN
210  state <= GOING_LOCK;
211  consecCorrectHeaders := 0;
212  END IF;
213 
214  WHEN GOING_LOCK => IF (dat_word_s(c_headerPattern'length-1 downto 0) /= c_headerPattern) THEN
215  state <= UNLOCKED;
216 
217  ELSE
218  consecCorrectHeaders := consecCorrectHeaders + 1;
219 
220  IF consecCorrectHeaders >= c_requiredTrueHeader THEN
221  state <= LOCKED;
222  END IF;
223  END IF;
224 
225  WHEN LOCKED => IF (dat_word_s(c_headerPattern'length-1 downto 0) /= c_headerPattern) THEN
226  consecFalseHeaders := 0;
227  nbCheckedHeaders := 0;
228  state <= GOING_UNLOCK;
229  END IF;
230 
231  WHEN GOING_UNLOCK => IF (dat_word_s(c_headerPattern'length-1 downto 0) = c_headerPattern) THEN
232 
233  IF nbCheckedHeaders = c_allowedFalseHeaderOverN THEN
234  state <= LOCKED;
235  ELSE
236  nbCheckedHeaders := nbCheckedHeaders + 1;
237  END IF;
238 
239  ELSE
240 
241  consecFalseHeaders := consecFalseHeaders + 1;
242 
243  IF consecFalseHeaders >= c_allowedFalseHeader THEN
244  state <= UNLOCKED;
245  END IF;
246  END IF;
247 
248  END CASE;
249  END IF;
250  END IF;
251  END PROCESS;
252 
253  headerLocked_sync: PROCESS(rst_pattsearch_i, clk_pcsRx_i)
254  BEGIN
255  IF rst_pattsearch_i = '1' THEN
256  sta_headerLocked_s <= '0';
257  ELSIF rising_edge(clk_pcsRx_i) THEN
258  IF psAddress = 0 THEN
259  IF state = LOCKED or state = GOING_UNLOCK THEN
260  sta_headerLocked_s <= '1';
261  ELSE
262  sta_headerLocked_s <= '0';
263  END IF;
264  END IF;
265  END IF;
266  END PROCESS;
267 
268  sta_headerFlag_o <= headerFlag_s WHEN (state = LOCKED or state = GOING_UNLOCK) ELSE '0';
269  --=====================================================================================--
270 END behavioral;
271 --=================================================================================================--
272 --#################################################################################################--
273 --=================================================================================================--
lpgbtfpga_framealigner.c_headerPattern
c_headerPatternstd_logic_vector%
Header pattern specified by the standard.
Definition: lpgbtfpga_framealigner.vhd:24
lpgbtfpga_framealigner.c_bitslip_mindly
c_bitslip_mindlyinteger%:=1
Number of clock cycle required WHEN asserting the bitslip SIGNAL.
Definition: lpgbtfpga_framealigner.vhd:29
lpgbtfpga_framealigner.rst_pattsearch_i
in rst_pattsearch_istd_logic%
Rst the pattern search state machines.
Definition: lpgbtfpga_framealigner.vhd:37
lpgbtfpga_framealigner.c_wordRatio
c_wordRatiointeger%
Word ration: frameclock / mgt_wordclock.
Definition: lpgbtfpga_framealigner.vhd:22
lpgbtfpga_framealigner.c_bitslip_waitdly
c_bitslip_waitdlyinteger%:=40
Number of clock cycle required before being back in a stable state.
Definition: lpgbtfpga_framealigner.vhd:30
lpgbtfpga_framealigner
lpgbtfpga_framealigner - MGT word aligner (Pattern search)
Definition: lpgbtfpga_framealigner.vhd:20
lpgbtfpga_framealigner.behavioral.lockFSM_proc
lockFSM_procrst_pattsearch_i, clk_pcsRx_i
Header locked state machine.
Definition: lpgbtfpga_framealigner.vhd:195
lpgbtfpga_descrambler.ieee
_library_ ieeeieee
Include the IEEE VHDL standard LIBRARY.
Definition: lpgbtfpga_descrambler.vhd:9
lpgbtfpga_framealigner.c_wordSize
c_wordSizeinteger%
Size of the mgt word.
Definition: lpgbtfpga_framealigner.vhd:23
lpgbtfpga_framealigner.c_allowedFalseHeaderOverN
c_allowedFalseHeaderOverNinteger%
Number of header checked to know wether the lock is lost or not.
Definition: lpgbtfpga_framealigner.vhd:26
lpgbtfpga_framealigner.sta_bitSlipEven_o
out sta_bitSlipEven_ostd_logic%
Status: number of bit slips is even.
Definition: lpgbtfpga_framealigner.vhd:45
lpgbtfpga_framealigner.c_allowedFalseHeader
c_allowedFalseHeaderinteger%
Number of false header allowed to avoid unlock on frame error.
Definition: lpgbtfpga_framealigner.vhd:25
lpgbtfpga_framealigner.sta_headerFlag_o
out sta_headerFlag_ostd_logic%
Status: header flag (1 pulse over c_wordRatio)
Definition: lpgbtfpga_framealigner.vhd:44
lpgbtfpga_package
Definition: lpgbtfpga_package.vhd:13
lpgbtfpga_framealigner.behavioral.patternSearchAddr_proc
patternSearchAddr_procrst_pattsearch_i, clk_pcsRx_i
Pattern search address controller.
Definition: lpgbtfpga_framealigner.vhd:169
lpgbtfpga_framealigner.behavioral.clkSlipProcess
clkSlipProcessrst_pattsearch_i, clk_pcsRx_i
MGT: Bitslip controller.
Definition: lpgbtfpga_framealigner.vhd:93
lpgbtfpga_framealigner.c_requiredTrueHeader
c_requiredTrueHeaderinteger%
Number of true header required to go in locked state.
Definition: lpgbtfpga_framealigner.vhd:27
lpgbtfpga_framealigner.dat_word_i
in dat_word_istd_logic_vector%(%c_headerPattern'%length%-%1%%%downto%%%0%)
Header bits from the MGT word (compared with c_headerPattern)
Definition: lpgbtfpga_framealigner.vhd:48
lpgbtfpga_framealigner.behavioral.patternSearch_proc
patternSearch_procrst_pattsearch_i, clk_pcsRx_i
Pattern searcher: check the header and ask for bitslip.
Definition: lpgbtfpga_framealigner.vhd:136
lpgbtfpga_framealigner.cmd_bitslipCtrl_o
out cmd_bitslipCtrl_ostd_logic%
Bitslip SIGNAL to shift the parrallel word.
Definition: lpgbtfpga_framealigner.vhd:40
lpgbtfpga_framealigner.sta_headerLocked_o
out sta_headerLocked_ostd_logic%
Status: header is locked.
Definition: lpgbtfpga_framealigner.vhd:43
lpgbtfpga_framealigner.clk_pcsRx_i
in clk_pcsRx_istd_logic%
MGT Wordclock.
Definition: lpgbtfpga_framealigner.vhd:34
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