behavioral Architecture Reference
lpgbtfpga_downlink - Downlink wrapper (top level) More...
Detailed Description
lpgbtfpga_downlink - Downlink wrapper (top level)
The lpgbtfpga_downlink module scrambles, encodes and interleaves the data to provide the encoded bus Used in the downlink communication with an LpGBT device. The output bus, which is made of 64 bits running at the LHC clock (about 40MHz) is encoded using a Reed-Solomon scheme and shall be sent using a serial link configured at 2.56Gbps.
Definition at line 58 of file lpgbtfpga_downlink.vhd.
The documentation for this class was generated from the following file:
- /mnt/lpgbt-fpga-sources/lpgbtfpga_downlink.vhd
Processes | |
| syncShiftReg_proc | ( rst_s , clk_i ) |
| Multicycle path configuration. | |
Components | |
| lpgbtfpga_scrambler | <Entity lpgbtfpga_scrambler> |
| Scrambler module used for the downlink encoding. | |
| lpgbtfpga_encoder | <Entity lpgbtfpga_encoder> |
| FEC calculator used for the downlink encoding. | |
| lpgbtfpga_interleaver | <Entity lpgbtfpga_interleaver> |
| Interleaver used to improve the decoding efficiency. | |
| lpgbtfpga_txGearbox | <Entity lpgbtfpga_txGearbox> |
| Clock ratio is clock_out / clock_in (shall be an integer) | |
Signals | |
| rst_s | std_logic |
| Ready SIGNAL. | |
| gbRst_s | std_logic |
| gbRdy_s | std_logic |
| encodedFrame_s | std_logic_vector ( 63 downto 0 ) |
| inputData_s | std_logic_vector ( 35 downto 0 ) |
| Data bus made of IC + EC + User Data (Used to input the scrambler) | |
| scrambledData_s | std_logic_vector ( 35 downto 0 ) |
| Scrambled data. | |
| FECData_s | std_logic_vector ( 23 downto 0 ) |
| FEC bus. | |
| clkOutEn_s | std_logic |
| rst_synch_s | std_logic |
Instantiations | |
| lpgbtfpga_scrambler_inst | lpgbtfpga_scrambler <Entity lpgbtfpga_scrambler> |
| Scrambler module Used for the downlink encoding. | |
| lpgbtfpga_encoder_inst | lpgbtfpga_encoder <Entity lpgbtfpga_encoder> |
| FEC calculator Used for the downlink encoding. | |
| lpgbtfpga_interleaver_inst | lpgbtfpga_interleaver <Entity lpgbtfpga_interleaver> |
| Interleaver Used to improve the decoding efficiency. | |
| lpgbtfpga_txgearbox_inst | lpgbtfpga_txGearbox <Entity lpgbtfpga_txGearbox> |
| Bridge between frame word and MGT word. | |
