lpgbtfpga_interleaver.vhd
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1 -------------------------------------------------------
6 -------------------------------------------------------
7 
9 LIBRARY ieee;
10 USE ieee.std_logic_1164.all;
11 
13 USE work.lpgbtfpga_package.all;
14 
19 ENTITY lpgbtfpga_interleaver IS
20  GENERIC (
21  HEADER_c : in std_logic_vector(3 downto 0) := "1001"
22  );
23  PORT (
24  -- Data
25  data_i : in std_logic_vector(35 downto 0);
26  FEC_i : in std_logic_vector(23 downto 0);
27 
28  data_o : out std_logic_vector(63 downto 0);
29 
30  -- Control
31  bypass : in std_logic
32  );
33 END lpgbtfpga_interleaver;
34 
41 ARCHITECTURE behavioral OF lpgbtfpga_interleaver IS
42 
43  SIGNAL interleaved_data : std_logic_vector(63 downto 0);
44 
45 BEGIN --========#### Architecture Body ####========--
46 
47  -- Data & Header
48  interleaved_data(63 downto 24) <= HEADER_c(3) &
49  data_i(35) &
50  HEADER_c(2) &
51  data_i(34) &
52  HEADER_c(1) &
53  data_i(33) &
54  HEADER_c(0) &
55  data_i(26 downto 24) &
56  data_i(17 downto 15) &
57  data_i(8 downto 6) &
58  data_i(32 downto 30) &
59  data_i(23 downto 21) &
60  data_i(14 downto 12) &
61  data_i(5 downto 3) &
62  data_i(29 downto 27) &
63  data_i(20 downto 18) &
64  data_i(11 downto 9) &
65  data_i(2 downto 0);
66 
67  -- FEC
68  interleaved_data(23 downto 0) <= FEC_i(23 downto 21) &
69  FEC_i(17 downto 15) &
70  FEC_i(11 downto 9) &
71  FEC_i(5 downto 3) &
72  FEC_i(20 downto 18) &
73  FEC_i(14 downto 12) &
74  FEC_i(8 downto 6) &
75  FEC_i(2 downto 0);
76 
77  data_o(63) <= interleaved_data(63) WHEN bypass = '0' ELSE
78  HEADER_c(3);
79 
80  data_o(62) <= interleaved_data(62) WHEN bypass = '0' ELSE
81  data_i(35);
82 
83  data_o(61) <= interleaved_data(61) WHEN bypass = '0' ELSE
84  HEADER_c(2);
85 
86  data_o(60) <= interleaved_data(60) WHEN bypass = '0' ELSE
87  data_i(34);
88 
89  data_o(59) <= interleaved_data(59) WHEN bypass = '0' ELSE
90  HEADER_c(1);
91 
92  data_o(58) <= interleaved_data(58) WHEN bypass = '0' ELSE
93  data_i(33);
94 
95  data_o(57) <= interleaved_data(57) WHEN bypass = '0' ELSE
96  HEADER_c(0);
97 
98  data_o(56 downto 24) <= interleaved_data(56 downto 24) WHEN bypass = '0' ELSE
99  data_i(32 downto 0);
100 
101  data_o(23 downto 0) <= interleaved_data(23 downto 0) WHEN bypass = '0' ELSE
102  FEC_i(23 downto 0);
103 
104 END behavioral;
105 --=================================================================================================--
106 --#################################################################################################--
107 --=================================================================================================--
lpgbtfpga_interleaver
lpgbtfpga_interleaver - Downlink data interleaver
Definition: lpgbtfpga_interleaver.vhd:19
lpgbtfpga_package
Definition: lpgbtfpga_package.vhd:13
lpgbtfpga_encoder.ieee
_library_ ieeeieee
Include the IEEE VHDL standard LIBRARY.
Definition: lpgbtfpga_encoder.vhd:9
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