fec_rsDecoderN15K13.vhd
Go to the documentation of this file.
1 -------------------------------------------------------
6 -------------------------------------------------------
7 
9 LIBRARY ieee;
10 USE ieee.std_logic_1164.all;
11 
13 USE work.lpgbtfpga_package.all;
14 
17  GENERIC (
18  N : integer := 15;
19  K : integer := 13;
20  SYMB_BITWIDTH : integer := 4
21  );
22  PORT (
23  payloadData_i : in std_logic_vector((K*SYMB_BITWIDTH)-1 downto 0);
24  fecData_i : in std_logic_vector(((N-K)*SYMB_BITWIDTH)-1 downto 0);
25 
26  data_o : out std_logic_vector((K*SYMB_BITWIDTH)-1 downto 0)
27  );
28 END rs_decoder_N15K13;
29 
31 ARCHITECTURE behavioral OF rs_decoder_N15K13 IS
32 
33  -- Functions
34  FUNCTION gf_multBy2_4 (
35  op : in std_logic_vector(3 downto 0)
36  )
37  RETURN std_logic_vector IS
38  VARIABLE tmp: std_logic_vector(3 downto 0);
39  BEGIN
40  tmp(0) := op(3);
41  tmp(1) := op(0) xor op(3);
42  tmp(2) := op(1);
43  tmp(3) := op(2);
44 
45  RETURN tmp;
46  END;
47 
48  FUNCTION gf_mult_4 (
49  op1 : in std_logic_vector(3 downto 0);
50  op2 : in std_logic_vector(3 downto 0)
51  )
52  RETURN std_logic_vector IS
53  VARIABLE tmp: std_logic_vector(3 downto 0);
54  BEGIN
55  tmp(0) := (op1(1) and op2(3)) xor (op1(2) and op2(2)) xor (op1(3) and op2(1)) xor (op1(0) and op2(0));
56  tmp(1) := (op1(1) and op2(0)) xor (op1(0) and op2(1)) xor (op1(3) and op2(1)) xor (op1(2) and op2(2)) xor (op1(3) and op2(2)) xor (op1(1) and op2(3)) xor (op1(2) and op2(3));
57  tmp(2) := (op1(2) and op2(0)) xor (op1(1) and op2(1)) xor (op1(0) and op2(2)) xor (op1(3) and op2(2)) xor (op1(2) and op2(3)) xor (op1(3) and op2(3));
58  tmp(3) := (op1(3) and op2(0)) xor (op1(2) and op2(1)) xor (op1(1) and op2(2)) xor (op1(0) and op2(3)) xor (op1(3) and op2(3));
59  RETURN tmp;
60  END;
61 
62  FUNCTION gf_inv_4 (
63  op : in std_logic_vector(3 downto 0)
64  )
65  RETURN std_logic_vector IS
66  VARIABLE tmp: std_logic_vector(3 downto 0);
67  BEGIN
68 
69  CASE op IS
70  WHEN "0000" => tmp := "0000"; -- 0
71  WHEN "0001" => tmp := "0001"; -- 1
72  WHEN "0010" => tmp := "1001"; -- 9
73  WHEN "0011" => tmp := "1110"; -- 14
74  WHEN "0100" => tmp := "1101"; -- 13
75  WHEN "0101" => tmp := "1011"; -- 11
76  WHEN "0110" => tmp := "0111"; -- 7
77  WHEN "0111" => tmp := "0110"; -- 6
78  WHEN "1000" => tmp := "1111"; -- 15
79  WHEN "1001" => tmp := "0010"; -- 2
80  WHEN "1010" => tmp := "1100"; -- 12
81  WHEN "1011" => tmp := "0101"; -- 5
82  WHEN "1100" => tmp := "1010"; -- 10
83  WHEN "1101" => tmp := "0100"; -- 4
84  WHEN "1110" => tmp := "0011"; -- 3
85  WHEN "1111" => tmp := "1000"; -- 8
86  WHEN OTHERS => tmp := "0000"; -- 0
87  END CASE;
88 
89  RETURN tmp;
90  END;
91 
92  FUNCTION gf_log_4 (
93  op : in std_logic_vector(3 downto 0)
94  )
95  RETURN std_logic_vector IS
96  VARIABLE tmp: std_logic_vector(3 downto 0);
97  BEGIN
98 
99  CASE op IS
100 
101  WHEN "0000" => tmp := "0000"; -- 0
102  WHEN "0001" => tmp := "0000"; -- 0
103  WHEN "0010" => tmp := "0001"; -- 1
104  WHEN "0011" => tmp := "0100"; -- 4
105  WHEN "0100" => tmp := "0010"; -- 2
106  WHEN "0101" => tmp := "1000"; -- 8
107  WHEN "0110" => tmp := "0101"; -- 5
108  WHEN "0111" => tmp := "1010"; -- 10
109  WHEN "1000" => tmp := "0011"; -- 3
110  WHEN "1001" => tmp := "1110"; -- 14
111  WHEN "1010" => tmp := "1001"; -- 9
112  WHEN "1011" => tmp := "0111"; -- 7
113  WHEN "1100" => tmp := "0110"; -- 6
114  WHEN "1101" => tmp := "1101"; -- 13
115  WHEN "1110" => tmp := "1011"; -- 11
116  WHEN "1111" => tmp := "1100"; -- 12
117  WHEN OTHERS => tmp := "0000"; -- 0
118  END CASE;
119 
120  RETURN tmp;
121  END;
122 
123  -- Signals
124  SIGNAL msg : std_logic_vector((N*SYMB_BITWIDTH)-1 downto 0);
125  SIGNAL decMsg : std_logic_vector((K*SYMB_BITWIDTH)-1 downto 0);
126 
127  SIGNAL outSt1 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
128  SIGNAL outSt2 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
129  SIGNAL outSt3 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
130  SIGNAL outSt4 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
131  SIGNAL outSt5 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
132  SIGNAL outSt6 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
133  SIGNAL outSt7 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
134  SIGNAL outSt8 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
135  SIGNAL outSt9 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
136  SIGNAL outSt10 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
137  SIGNAL outSt11 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
138  SIGNAL outSt12 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
139  SIGNAL outSt13 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
140  SIGNAL outAdd0 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
141  SIGNAL outAdd1 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
142  SIGNAL outAdd2 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
143  SIGNAL outAdd3 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
144  SIGNAL outAdd4 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
145  SIGNAL outAdd5 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
146  SIGNAL outAdd6 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
147  SIGNAL outAdd7 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
148  SIGNAL outAdd8 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
149  SIGNAL outAdd9 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
150  SIGNAL outAdd10 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
151  SIGNAL outAdd11 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
152  SIGNAL outAdd12 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
153  SIGNAL outMult0 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
154  SIGNAL outMult1 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
155  SIGNAL outMult2 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
156  SIGNAL outMult3 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
157  SIGNAL outMult4 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
158  SIGNAL outMult5 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
159  SIGNAL outMult6 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
160  SIGNAL outMult7 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
161  SIGNAL outMult8 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
162  SIGNAL outMult9 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
163  SIGNAL outMult10 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
164  SIGNAL outMult11 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
165  SIGNAL outMult12 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
166  SIGNAL outMult13 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
167  SIGNAL syndr0 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
168  SIGNAL syndr1 : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
169  SIGNAL syndr0_inv : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
170  SIGNAL syndrProd : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
171  SIGNAL errorPos : std_logic_vector((SYMB_BITWIDTH-1) downto 0);
172 
173 BEGIN --========#### Architecture Body ####========--
174 
175  -- ---------------- The Parallel LFSR HDL description ---------------- --
176 
177  -- MSG mapping
178  msg <= fecData_i & payloadData_i;
179 
180  -- Evaluates the first syndrom
181  outSt1 <= msg(((SYMB_BITWIDTH + 0)-1) downto 0) xor msg(((2*SYMB_BITWIDTH)-1) downto SYMB_BITWIDTH);
182  outSt2 <= msg(((SYMB_BITWIDTH + 2*SYMB_BITWIDTH)-1) downto (2*SYMB_BITWIDTH)) xor outSt1;
183  outSt3 <= msg(((SYMB_BITWIDTH + 3*SYMB_BITWIDTH)-1) downto (3*SYMB_BITWIDTH)) xor outSt2;
184  outSt4 <= msg(((SYMB_BITWIDTH + 4*SYMB_BITWIDTH)-1) downto (4*SYMB_BITWIDTH)) xor outSt3;
185  outSt5 <= msg(((SYMB_BITWIDTH + 5*SYMB_BITWIDTH)-1) downto (5*SYMB_BITWIDTH)) xor outSt4;
186  outSt6 <= msg(((SYMB_BITWIDTH + 6*SYMB_BITWIDTH)-1) downto (6*SYMB_BITWIDTH)) xor outSt5;
187  outSt7 <= msg(((SYMB_BITWIDTH + 7*SYMB_BITWIDTH)-1) downto (7*SYMB_BITWIDTH)) xor outSt6;
188  outSt8 <= msg(((SYMB_BITWIDTH + 8*SYMB_BITWIDTH)-1) downto (8*SYMB_BITWIDTH)) xor outSt7;
189  outSt9 <= msg(((SYMB_BITWIDTH + 9*SYMB_BITWIDTH)-1) downto (9*SYMB_BITWIDTH)) xor outSt8;
190  outSt10 <= msg(((SYMB_BITWIDTH + 10*SYMB_BITWIDTH)-1) downto (10*SYMB_BITWIDTH)) xor outSt9;
191  outSt11 <= msg(((SYMB_BITWIDTH + 11*SYMB_BITWIDTH)-1) downto (11*SYMB_BITWIDTH)) xor outSt10;
192  outSt12 <= msg(((SYMB_BITWIDTH + 12*SYMB_BITWIDTH)-1) downto (12*SYMB_BITWIDTH)) xor outSt11;
193  outSt13 <= msg(((SYMB_BITWIDTH + 13*SYMB_BITWIDTH)-1) downto (13*SYMB_BITWIDTH)) xor outSt12;
194  syndr0 <= msg(((SYMB_BITWIDTH + 14*SYMB_BITWIDTH)-1) downto (14*SYMB_BITWIDTH)) xor outSt13;
195 
196  -- Evaluates the second syndrom
197  outMult0 <= gf_multBy2_4(msg(SYMB_BITWIDTH-1 downto 0));
198  outMult1 <= gf_multBy2_4(outAdd0);
199  outMult2 <= gf_multBy2_4(outAdd1);
200  outMult3 <= gf_multBy2_4(outAdd2);
201  outMult4 <= gf_multBy2_4(outAdd3);
202  outMult5 <= gf_multBy2_4(outAdd4);
203  outMult6 <= gf_multBy2_4(outAdd5);
204  outMult7 <= gf_multBy2_4(outAdd6);
205  outMult8 <= gf_multBy2_4(outAdd7);
206  outMult9 <= gf_multBy2_4(outAdd8);
207  outMult10 <= gf_multBy2_4(outAdd9);
208  outMult11 <= gf_multBy2_4(outAdd10);
209  outMult12 <= gf_multBy2_4(outAdd11);
210  outMult13 <= gf_multBy2_4(outAdd12);
211 
212  outAdd0 <= outMult0 xor msg(((SYMB_BITWIDTH+SYMB_BITWIDTH)-1) downto SYMB_BITWIDTH);
213  outAdd1 <= outMult1 xor msg(((SYMB_BITWIDTH+2*SYMB_BITWIDTH)-1) downto (2*SYMB_BITWIDTH));
214  outAdd2 <= outMult2 xor msg(((SYMB_BITWIDTH+3*SYMB_BITWIDTH)-1) downto (3*SYMB_BITWIDTH));
215  outAdd3 <= outMult3 xor msg(((SYMB_BITWIDTH+4*SYMB_BITWIDTH)-1) downto (4*SYMB_BITWIDTH));
216  outAdd4 <= outMult4 xor msg(((SYMB_BITWIDTH+5*SYMB_BITWIDTH)-1) downto (5*SYMB_BITWIDTH));
217  outAdd5 <= outMult5 xor msg(((SYMB_BITWIDTH+6*SYMB_BITWIDTH)-1) downto (6*SYMB_BITWIDTH));
218  outAdd6 <= outMult6 xor msg(((SYMB_BITWIDTH+7*SYMB_BITWIDTH)-1) downto (7*SYMB_BITWIDTH));
219  outAdd7 <= outMult7 xor msg(((SYMB_BITWIDTH+8*SYMB_BITWIDTH)-1) downto (8*SYMB_BITWIDTH));
220  outAdd8 <= outMult8 xor msg(((SYMB_BITWIDTH+9*SYMB_BITWIDTH)-1) downto (9*SYMB_BITWIDTH));
221  outAdd9 <= outMult9 xor msg(((SYMB_BITWIDTH+10*SYMB_BITWIDTH)-1) downto (10*SYMB_BITWIDTH));
222  outAdd10 <= outMult10 xor msg(((SYMB_BITWIDTH+11*SYMB_BITWIDTH)-1) downto (11*SYMB_BITWIDTH));
223  outAdd11 <= outMult11 xor msg(((SYMB_BITWIDTH+12*SYMB_BITWIDTH)-1) downto (12*SYMB_BITWIDTH));
224  outAdd12 <= outMult12 xor msg(((SYMB_BITWIDTH+13*SYMB_BITWIDTH)-1) downto (13*SYMB_BITWIDTH));
225  syndr1 <= outMult13 xor msg(((SYMB_BITWIDTH+14*SYMB_BITWIDTH)-1) downto (14*SYMB_BITWIDTH));
226 
227  -- Evaluates position of error
228  syndr0_inv <= gf_inv_4(syndr0);
229  syndrProd <= gf_mult_4(syndr0_inv, syndr1);
230  errorPos <= gf_log_4(syndrProd);
231 
232  -- Correct message.. Correction on parity bits is ignored!
233  decMsg(((SYMB_BITWIDTH+12*SYMB_BITWIDTH)-1) downto (12*SYMB_BITWIDTH)) <= msg(((SYMB_BITWIDTH+12*SYMB_BITWIDTH)-1) downto (12*SYMB_BITWIDTH)) xor syndr0 WHEN errorPos = "0010" ELSE
234  msg(((SYMB_BITWIDTH+12*SYMB_BITWIDTH)-1) downto (12*SYMB_BITWIDTH));
235 
236  decMsg(((SYMB_BITWIDTH+11*SYMB_BITWIDTH)-1) downto (11*SYMB_BITWIDTH)) <= msg(((SYMB_BITWIDTH+11*SYMB_BITWIDTH)-1) downto (11*SYMB_BITWIDTH)) xor syndr0 WHEN errorPos = "0011" ELSE
237  msg(((SYMB_BITWIDTH+11*SYMB_BITWIDTH)-1) downto (11*SYMB_BITWIDTH));
238 
239  decMsg(((SYMB_BITWIDTH+10*SYMB_BITWIDTH)-1) downto (10*SYMB_BITWIDTH)) <= msg(((SYMB_BITWIDTH+10*SYMB_BITWIDTH)-1) downto (10*SYMB_BITWIDTH)) xor syndr0 WHEN errorPos = "0100" ELSE
240  msg(((SYMB_BITWIDTH+10*SYMB_BITWIDTH)-1) downto (10*SYMB_BITWIDTH));
241 
242  decMsg(((SYMB_BITWIDTH+9*SYMB_BITWIDTH)-1) downto (9*SYMB_BITWIDTH)) <= msg(((SYMB_BITWIDTH+9*SYMB_BITWIDTH)-1) downto (9*SYMB_BITWIDTH)) xor syndr0 WHEN errorPos = "0101" ELSE
243  msg(((SYMB_BITWIDTH+9*SYMB_BITWIDTH)-1) downto (9*SYMB_BITWIDTH));
244 
245  decMsg(((SYMB_BITWIDTH+8*SYMB_BITWIDTH)-1) downto (8*SYMB_BITWIDTH)) <= msg(((SYMB_BITWIDTH+8*SYMB_BITWIDTH)-1) downto (8*SYMB_BITWIDTH)) xor syndr0 WHEN errorPos = "0110" ELSE
246  msg(((SYMB_BITWIDTH+8*SYMB_BITWIDTH)-1) downto (8*SYMB_BITWIDTH));
247 
248  decMsg(((SYMB_BITWIDTH+7*SYMB_BITWIDTH)-1) downto (7*SYMB_BITWIDTH)) <= msg(((SYMB_BITWIDTH+7*SYMB_BITWIDTH)-1) downto (7*SYMB_BITWIDTH)) xor syndr0 WHEN errorPos = "0111" ELSE
249  msg(((SYMB_BITWIDTH+7*SYMB_BITWIDTH)-1) downto (7*SYMB_BITWIDTH));
250 
251  decMsg(((SYMB_BITWIDTH+6*SYMB_BITWIDTH)-1) downto (6*SYMB_BITWIDTH)) <= msg(((SYMB_BITWIDTH+6*SYMB_BITWIDTH)-1) downto (6*SYMB_BITWIDTH)) xor syndr0 WHEN errorPos = "1000" ELSE
252  msg(((SYMB_BITWIDTH+6*SYMB_BITWIDTH)-1) downto (6*SYMB_BITWIDTH));
253 
254  decMsg(((SYMB_BITWIDTH+5*SYMB_BITWIDTH)-1) downto (5*SYMB_BITWIDTH)) <= msg(((SYMB_BITWIDTH+5*SYMB_BITWIDTH)-1) downto (5*SYMB_BITWIDTH)) xor syndr0 WHEN errorPos = "1001" ELSE
255  msg(((SYMB_BITWIDTH+5*SYMB_BITWIDTH)-1) downto (5*SYMB_BITWIDTH));
256 
257  decMsg(((SYMB_BITWIDTH+4*SYMB_BITWIDTH)-1) downto (4*SYMB_BITWIDTH)) <= msg(((SYMB_BITWIDTH+4*SYMB_BITWIDTH)-1) downto (4*SYMB_BITWIDTH)) xor syndr0 WHEN errorPos = "1010" ELSE
258  msg(((SYMB_BITWIDTH+4*SYMB_BITWIDTH)-1) downto (4*SYMB_BITWIDTH));
259 
260  decMsg(((SYMB_BITWIDTH+3*SYMB_BITWIDTH)-1) downto (3*SYMB_BITWIDTH)) <= msg(((SYMB_BITWIDTH+3*SYMB_BITWIDTH)-1) downto (3*SYMB_BITWIDTH)) xor syndr0 WHEN errorPos = "1011" ELSE
261  msg(((SYMB_BITWIDTH+3*SYMB_BITWIDTH)-1) downto (3*SYMB_BITWIDTH));
262 
263  decMsg(((SYMB_BITWIDTH+2*SYMB_BITWIDTH)-1) downto (2*SYMB_BITWIDTH)) <= msg(((SYMB_BITWIDTH+2*SYMB_BITWIDTH)-1) downto (2*SYMB_BITWIDTH)) xor syndr0 WHEN errorPos = "1100" ELSE
264  msg(((SYMB_BITWIDTH+2*SYMB_BITWIDTH)-1) downto (2*SYMB_BITWIDTH));
265 
266  decMsg(((SYMB_BITWIDTH+1*SYMB_BITWIDTH)-1) downto (1*SYMB_BITWIDTH)) <= msg(((SYMB_BITWIDTH+1*SYMB_BITWIDTH)-1) downto (1*SYMB_BITWIDTH)) xor syndr0 WHEN errorPos = "1101" ELSE
267  msg(((SYMB_BITWIDTH+1*SYMB_BITWIDTH)-1) downto (1*SYMB_BITWIDTH));
268 
269  decMsg(((SYMB_BITWIDTH+0*SYMB_BITWIDTH)-1) downto (0*SYMB_BITWIDTH)) <= msg(((SYMB_BITWIDTH+0*SYMB_BITWIDTH)-1) downto (0*SYMB_BITWIDTH)) xor syndr0 WHEN errorPos = "1110" ELSE
270  msg(((SYMB_BITWIDTH+0*SYMB_BITWIDTH)-1) downto (0*SYMB_BITWIDTH));
271 
272  data_o <= decMsg;
273 
274 END behavioral;
275 --=================================================================================================--
276 --#################################################################################################--
277 --=================================================================================================--
rs_decoder_N15K13 - N15K13 Reed-Solomon decoder
in payloadData_istd_logic_vector%(%(K%*%SYMB_BITWIDTH)%-%1%%%downto%%%0%)
Message to be decoded.
out data_ostd_logic_vector%(%(K%*%SYMB_BITWIDTH)%-%1%%%downto%%%0%)
Decoded / corrected data.
in fecData_istd_logic_vector%(%((N%-%K)%*%SYMB_BITWIDTH)%-%1%%%downto%%%0%)
FEC USEd to decode.
_library_ ieeeieee
Include the IEEE VHDL standard LIBRARY.