What is the impact of the dynamic datarate on 5.12Gbps link?
Using the dynamic datarate forces the transceiver to be configured at 10.24Gbps. Therefore, when a 5.12Gbps signal is deserialized, each bit is repeated twice corresping to 2 samples with different phases.
The picture below shows how the signal should be sampled when the transceiver is configured at the right frequency (5.12Gbps):
![](http://lpgbt-fpga.web.cern.ch/img/SignalSampledAt5g12.png)
In this case, the impact of the jitter is limited as the sampling is made in the center of the eye. However, oversampling at twice the line rate means getting the samples closer from the edge and increases the impact of the jitter as shown on the figure below:
![](http://lpgbt-fpga.web.cern.ch/img/SignalSampledAt10g24.png)
Nevertheless, to improve the quality of dynamic decoding, both words deserialized on phases 1 and 2 are sent to the decoder and a selection is made using the "error detected" signal. That just require an additional mux with an or gate. The decoding logic is already implemented for the 10.24Gbps data rate.