lpgbtfpga_interleaver Entity Reference

lpgbtfpga_interleaver - Downlink data interleaver More...

Inheritance diagram for lpgbtfpga_interleaver:
lpgbtfpga_downlink

Detailed Description

lpgbtfpga_interleaver - Downlink data interleaver

Interleaves the data to mix THEN encoded symbols and improve the decoding efficiency by increasing the number of consecutive bits with errors accepted.

Definition at line 19 of file lpgbtfpga_interleaver.vhd.


The documentation for this class was generated from the following file:

Entities

behavioral  architecture
 lpgbtfpga_interleaver - Downlink data interleaver More...
 

Libraries

ieee 
 Include the IEEE VHDL standard LIBRARY.

Use Clauses

ieee.std_logic_1164.all 
work.lpgbtfpga_package.all 
 Include the lpGBT-FPGA specific package.

Generics

HEADER_c  std_logic_vector ( 3 downto 0 ) := " 1001 "

Ports

data_i   in std_logic_vector ( 35 downto 0 )
FEC_i   in std_logic_vector ( 23 downto 0 )
data_o   out std_logic_vector ( 63 downto 0 )
bypass   in std_logic